It seems that the semiconductor industry can’t go a year without someone raising the tired old flag that is the impending doom of Moore’s Law. Nearly every year there’s a group of people out to see it finally meet its end although to what purpose I could not tell you. However as an industry observer will tell you these predictions have, for the past 5 decades, proved to be incorrect as any insurmountable barrier is usually overcome when the requisite billions are thrown at the problem. However we are coming to a point where our reigning champion behind Moore’s Law, namely planar transistors built on silicon, is starting to reach the end of its life and thus we have been searching for its ultimate replacement. Whilst it seems inevitable that a new material will become the basis upon which we build our new computing empire the question of how that material will be shaped is still unanswered, but there are rumblings of what may come.
For the vast majority of computing devices out there the transistors underneath the hood are created in a planar fashion, I.E. they essentially exist in a 2 dimensional space. In terms of manufacturing this has many advantages and the advances we’ve made in planar technology over the years have seen us break through many barriers that threatened to kill Moore’s Law in its tracks. Adding in that additional dimension however is no trivial task and whilst it’s not beyond our capability to do, indeed my computer is powered by a component that makes use of a 3D manufacturing process, but applying it to something as complicated as a CPU requires an incredible amount of effort. However the benefits of doing so are proving to be many and the transistor pictured above, called a Quantum Well Field Effect Transistor (QWFET), could be the ram with which we break through the next barrier to escalating Moore’s Law.
The main driver behind progress in the CPU market comes from making transistors ever-smaller, something which allows us to pack more of them in the same space whilst also giving us benefits like reduced power consumption. However as we get smaller issues that could be ignored, like gate leakage back when we were still at the 45nm stage, start to become fundamental blockers to progress. Right now, as we approach sizes below 10nm, that same problem is starting to rear its head again and we need to look at innovative solutions to tackle it. The QWFET is one such solution as it has the potential to eliminate the leakage problem whilst allowing us to continue our die shrinking ways.
QWFETs are essentially an extension of Intel’s current FinFET technology. In the current FinFETs electrons are bounded on 3 sides which is what helped Intel make their current die shrink workable (although it has taken them much longer than expected to get the yeilds right). In QWFETs the electrons are bounded on an additional side which forms a quantum well inside the transistor. This drastically reduces the leakage which would otherwise plague a transistor of a sub-10nm size and, as a benefit, significantly reduces power draw as the static power usage drops considerably.
This does sound good in principle and would be easy to write off as hot air had Intel not been working on it since at least 2010. Some of their latest research points to these kinds of transistors being the way forward all the way down to 5nm which would keep Moore’s Law trucking along for quite some time considering we’re just on the cusp of 14nm products hitting our shelves. Of course this is all speculative at this time however there’s a lot of writing on the wall that’s pointing to this as being the way forward. If this turns out to not be the case then I’d be very interested to see what Intel had up their sleeves as it’d have to be something even more revolutionary than this.
Either way it’l be great for us supporters of Moore’s Law and, of course, users of computers in general.
For as long as we’ve been using semiconductors there’s been one material that’s held the crown: silicon. Being one of the most abundant elements on Earth its semiconductor properties made it perfectly suited to mass manufacture and nearly all of the world’s electronics contain a silicon brain within them. Silicon isn’t the only material capable of performing this function, indeed there’s a whole smorgasbord of other semiconductors that are used for specific applications, however the amount of research poured into silicon means few of them are as mature as it is. However with our manufacturing processes shrinking we’re fast approaching the limit of what silicon, in its current form, is capable of and that may pave the way for a new contender for the semiconductor crown.
The road to the current 14nm manufacturing process has been a bumpy one, as the heavily delayed release of Intel’s Broadwell can attest to. Mostly this was due to the low yields that Intel was getting with the process, which is typical for die shrinks, however solving the issue proved to be more difficult than they had originally thought. This is likely due to the challenges Intel faced with making their FinFET technology work at the smaller scale as they had only just introduced it in the previous 22nm generation of CPUs. This process will likely still work down at the 10nm level (as Samsung has just proven today) but beyond that there’s going to need to be a fundamental shift in order for the die shrinks to continue.
For this Intel has alluded to new materials which, keen observers have pointed out, won’t be silicon.
The type of material that’s a likely candidate to replace silicon is something called Indium Gallium Arsenide (InGaAs). They’ve long been used in photodetectors and high frequency applications like microwave and millimeter wave applications. Transistors made from this substrate are called High-Electron Mobility Transistors which, in simpler terms, means that they can be made smaller, switch faster and more packed into a certain size. Whilst the foundries might not yet be able to create these kinds of transistors at scale the fact that they’ve been manufactured at some scale for decades now makes them a viable alternative rather than some of the other, more exotic materials.
There is potential for silicon to hang around for another die shrink or two if Extreme Ultraviolet (EUV) lithography takes off however that method has been plagued with developmental issues for some time now. The change between UV lithography and EUV isn’t a trivial one as EUV can’t be made into a laser and needs mirrors to be directed since most materials will simply absorb the EUV light. Couple that with the rather large difficulty in generating EUV light in the first place (it’s rather inefficient) and it makes looking at new substrates much more appealing. Still if TSMC, Intel or Samsung can figure it out then there’d be a bit more headroom for silicon, although maybe not enough to offset the investment cost.
Whatever direction the semiconductor industry takes one thing is very clear: they all have plans that extend far beyond the current short term to ensure that we can keep up the rapid pace of technological development that we’ve enjoyed for the past half century. I can’t tell you how many times I’ve heard others scream that the next die shrink would be our last, only to see some incredibly innovative solutions to come out soon after. The transition to InGaAs or EUV shows that we’re prepared for at least the next decade and I’m sure before we hit the limit of that tech we’ll be seeing the next novel innovation that will continue to power us forward.
The popular interpretation of Moore’s Law is that computing power, namely of the CPU, doubles every two years or so. This is then extended to pretty much all aspects of computing such as storage, network transfer speeds and so on. Whilst this interpretation has held up reasonably well in the past 40+ years since the law has coined it’s actually not completely accurate as Moore was actually referring to the number of components that could be integrated into a single package for a minimum cost. Thus the real driver behind Moore’s law isn’t performance, per se, it’s the cost at which we can provide said integrated package. Keeping on track with this law hasn’t been easy but innovations like Intel’s new 14nm process are what have been keeping us on track.
CPUs are created through a process called Photolithography whereby a substrate, typically a silicon wafer, has the transistors etched onto it through a process not unlike developing a photo. The defining characteristic of this process is the minimum size of a feature that the process can etch on the wafer which is usually expressed in terms of nanometers. It was long thought that 22nm would be the limit for semiconductor manufacturing as this process was approaching the physical limitations of the substrates used. However Intel, and many other semiconductor manufacturers, have been developing processes that push past this and today Intel has released in depth information regarding their new 14nm process.
The improvements in the process are pretty much what you’d come to expect from a node improvement of this nature. A reduction in node size typically means that a CPU can be made with more transistors that performs better and uses less power than a similar CPU built on a larger sized node. This is most certainly the case with Intel’s new 14nm fabrication process and, interesting enough, they appear to be ahead of the curve so to speak, with the improvements in this process being slightly ahead of the trend. However the most important factor, at least in respect Moore’s Law, is that they’ve managed to keep reducing the cost per transistor.
One of the biggest cost drivers for CPUs is what’s called the yield of the wafer. Each of these wafers costs a certain amount of money and, depending on how big and complex your CPU is, you can only fit a certain number of them on there. However not all of those CPUs will turn out to be viable and the percentage of usable CPUs is what’s known as the wafer yield. Moving to a new node size typically means that your yield takes a dive which drives up the cost of the CPU significantly. The recently embargoed documents from Intel reveals however that the yield for the 14nm process is rapidly approaching that of the 22nm process which is considered to be Intel’s best yielding process to date. This, plus the increased transistor density that’s possible with the new manufacturing process, is what has led to the price per transistor dropping giving Moore’s law a little more breathing room for the next couple years.
This 14nm process is what will be powering Intel’s new Broadwell set of chips, the first of which is due out later this year. Migrating to this new manufacturing process hasn’t been without its difficulties which is what has led to Intel releasing only a subset of the Broadwell chips later this year, with the rest to come in 2015. Until we get our hands on some of the actual chips there’s no telling just how much of an improvement these will be over their Haswell predecessors but the die shrink alone should see some significant improvements. With the yields fast approaching those of its predecessors they’ll hopefully be quite reasonably priced too, for a new technology at least.
It just goes to show that Moore’s law is proving to be far more robust than anyone could have predicted. Exponential growth functions like that are notoriously unsustainable however it seems every time we come up against another wall that threatens to kill the law off another innovative way to deal with it comes around. Intel has long been at the forefront of keeping Moore’s law alive and it seems like they’ll continue to be its patron saint for a long time to come.